What's new
By:
Filters

Build your own Furrtek NeoGeo Fusion MVS to AES adapter - how to program .jed to CPLD?

hatmoose

hatmoose

Enlightened
Joined
Mar 25, 2021
Messages
1,270
Reaction score
2,626
Location
New Zealand
Hi Everyone

I've been making my own Fusion MVS to AES adapter with the amazing resources here. Furrtek is an absolute legend and had released all of this work for free.
http://furrtek.free.fr/fusion/

This one is absolutely a labour of love - Furrtek's prices on these are insanely good value. Making my own is for fun and learning only - much faster/cheaper/better to buy the real deal.
http://furrtek.free.fr/shop/

Which brings me to my question.
I have assembled the boards, need to upload the .jed file to the CPLD. The CPLD is a Lattice LC4064ZE and I have... absolutely no idea how to do this.

Its not often that I'd so stumped that I dont know where to start, but for this one - I got nothing.

Is there a kind internet friend who can point me in the right direction please?

Pic for attention
IMG_8681.png
 
Digikey can send these to you pre-programmed, at worst case.
 
This turned out to be much harder than expected: I believe @rewrite is correct, getting the chip supplier to program these is the only way to proceed

ispMACH 4000ZE page here
https://www.latticesemi.com/Products/FPGAandCPLD/ispMACH4000ZE

programming hardware is reasonably easy-ish
https://www.latticesemi.com/Products/ProgrammingHardware
or
https://www.aliexpress.com/item/1005003143843450.html

Software is not easy in any way
https://www.latticesemi.com/Support/Licensing
which means we need ispLEVER classic
https://www.latticesemi.com/Products/DesignSoftwareAndIP/FPGAandLDS/ispLEVERClassic
ispLEVER classic was "free" until 2022 (if its not FOSS its not free) until Lattice decided to revoke the free licence and move to $US600 per year paid subscription
https://www.eevblog.com/forum/fpga/any-open-source-tools-for-lattice-ispmach-4000/

Next step, email Digikey and ask them to do it for me
 
Yeah, the Furrtek replacement project for the PCM chip uses the same software.
There is an old version of the software on archive.org but I don't know if it works.
 
Have you tried OpenOCD? It already supports the LC4032ZE. The LC4064ZE will probably have a different ID on scan so you can make your own cfg file using the new ID. Connect the JTAG pins to the PIO pins on a raspberry pi and you should be good to go.
 
leonk said:
Have you tried OpenOCD? It already supports the LC4032ZE. The LC4064ZE will probably have a different ID on scan so you can make your own cfg file using the new ID. Connect the JTAG pins to the PIO pins on a raspberry pi and you should be good to go.
Click to expand...
pretty sure you need a svf file to use openocd.
 
OpenOCD does seem to have drivers built-in for a handful of devices, but I can't tell if this allows anything more than detecting it:
https://github.com/openocd-org/openocd/blob/master/tcl/cpld/lattice-lc4032ze.cfg
If you can find a way to generate an svf you should have more options to actually program it. Maybe ask on some cpld focussed forum?
(SVF is a text file and contains the actual JTAG commands and data that would be sent to program a device.)
(I was going to compare the jed and svf for some chips to see if I can generate them myself, though I have so little time at the moment... And they would still be strictly chip specific.)
 
Last edited:
Response back from Digikey on programming

One time setup fee of $US50, sample size is 10 chips + 1 more that they use for testing.

So minimum entry cost = $73.15 (11 x chips) + $50 (programming fee) = $US123 for 10 chips
 
I'd open a ticket on GitHub, explain the situation, and ask if it is possible to include an svf in the repository so you can use generic programming hardware.
 
Have requested the same in GitHub Issues, hopefully they have patience for my noobness

Quick check of GitHub issues turned up some interesting notes in other issues.

Looks like it should be possible to use Quartus to compile the supplied .v (Verilog) file which I hope would give the complete set of outputs?
 
You can try, you'll have to check which version supports the chip. If the chip is supported you could create a project for that chip, add the verilog file, build and use the programmer to generate the SVF. Quartus creates "pof" files as output, which is similar to a jed just binary.
If you're lucky and your cable is supported you may even be able to program it right away.
 
I just had a look, he doesn't include a pin constraint file, so if you create a project you'll need to make sure the pins match what the schematic expects.
 
Virtualbox (by Oracle) and ispLever (by Lattice) - in hindsight this was never going to end well.

After several hours of not going well I gave up and came back to OpenOCD. New plan looks like this

As far as I can tell the .svf file has a bunch TDI, TDO, and TCK commands, all the chip identification and other stuff is commented out.

Buy openOCD supported USB to JTAG interface like this one
https://www.amazon.com/Teyleten-Robot-FT232H-High-Speed-Multifunction/dp/B09XTF7C1P

Get the .svf that Furrtek has kindly published
https://github.com/neogeodev/FusionConverter/blob/master/fusion_vsense.svf

Borrow the pin assignments from here to attach it
https://www.arcade-projects.com/thr...lled-11-13-waitlist.27699/page-39#post-446363

JTAG.png

AD0 = TCK
AD1 = TDI
AD2 = TDO
AD3 = TMS
GND = GND
VCORE(which I assume is 1.8v) = 1V8

Then push it on with a command like this
openocd -f C:/openocd/share/openocd/scripts/interface/ftdi/um232h.cfg -c "adapter speed 400" -c "transport select jtag" -c init -c “fusion_vsense.svf" -c shutdown

Any suggestions gratefully accepted while I wait 2 weeks for delivery of the interface board...
 
FWIW, I own many exotic interface boards from Altera to Xilinx and in all cases, when it comes to programming different FPGAs and CPLDs, I pull out my raspberry pi and use OpenOCD. I did build the latest version of OpenOCD from source (as the one that comes from repo is old and broken) so you need to be comfortable with Linux and building from source but once you start doing things on the command line in Linux, hard to go back to proprietary software in Windows. :)
 
Usually a good idea to first scan for devices before you go directly to programming

openocd -f C:/openocd/share/openocd/scripts/interface/ftdi/um232h.cfg -c "adapter speed 400" -c "transport select jtag" -c init -c scan_chain -c shutdown

Your programming command is also bugged. it should be "svf fusion_vsense.svf"
 
You must log in or register to reply here.
Back
Top